FIG. 1 is a circuit diagram of a conventional amplifier circuit using a multiple gated transistor (MGTR).
Referring to FIG. 1, the conventional amplifier circuit includes a transistor MN11, a MGTR composed of a main transistor MN12 and an auxiliary transistor MN13, a resistor R11, and an inductor L11.
The gate, drain and source of the main transistor MN12 are respectively connected to the gate, drain and source of the auxiliary transistor MN13 to construct an amplification unit.
The sources of the main transistor MN12 and auxiliary transistor MN13 are connected to the inductor L11 to form an attenuation unit. The gates of the main transistor MN12 and auxiliary transistor MN13 are commonly connected to an input terminal.
The source of the transistor MN11 is connected to the drains of the transistors MN12 and MN13 of the amplification unit. The drain of the transistor MN11 is connected to the resistor R11 and the output terminal of an output unit.
The operation of the conventional amplifier circuit using a MGTR will now be explained.
An input signal is applied to the gates of the main transistor MN12 and auxiliary transistor MN13 to be amplified. Here, the operating characteristic of the auxiliary transistor MN13 is controlled to remove the third order intermodulation distortion IMD3 when the main transistor MN12 amplifies the input signal.
The operating characteristic of the transistor MN12 is different from that of transistor MN13 so that the linearity of the amplifier is improved. However, when an inductor is connected to the sources of the transistors MN12 and MN13, linearity improvement is mitigated, particularly, at a high frequency.
The inductor is inevitably added to the amplifier circuit for packaging Integrated Circuit(IC) chip or connecting to the circuit for input impedance matching.
When a low noise amplifier is designed, particularly, the inductor is added to the amplifier circuit for input impedance matching. In this case, when an inductive component is connected to the source of a transistor for series-negative feed-back, the inductive component corresponds to the real component of the input impedance from the gate of the transistor and thus the inductive component appears to be a resistor.
Here, the resistance of the resistor is gm*Ls/(Cgs) where gm is transconductance of the transistor, Ls is inductance of the inductive component, and Cgs is gate-source capacitance of the transistor.
This method is used to simultaneously accomplish noise figure optimization matching and input power matching in the case of a low noise amplifier.
According to this method, however, offset effect of gm″ does not appear at a high frequency in the case of MGTR. When an inductor is connected to the source of a transistor, an imaginary component of gm″ impedance is generated and becomes a component determining non-linearity. That is, a real component of gm″ is effectively cancelled by a MGTR but the imaginary component of gm″ is newly generated due to the inductor connected to the source of the transistor. Thus, linearity improvement effect of the MGTR is removed (referring to IEEE RFIC Symposium 2004 Fort Worth, Tex. USA 6-8, Jun. 2004′).
FIG. 2 is a circuit diagram of a conventional amplifier circuit using a MGTR to avoid the shortcomings of the amplifier circuit shown in FIG. 1. The amplifier circuit of FIG. 2 is disclosed in “IEEE RFIC Symposium 2004 Fort Worth, Tex. USB 6-8, Jun. 2004′” and proposed by Qualcomm.
Referring to FIG. 2, the amplifier circuit includes transistors MN21 through MN25, capacitors C21, C22 and C23, inductors L21, L22, L23 and L24, current sources Is21 and Is22, and resistors R21 and R22.
The drain of the main transistor MN21 is connected to the drain of the auxiliary transistor MN22, the source of the main transistor MN21 is connected to the inductor L21, and the source of the auxiliary transistor MN22 is connected to the inductor L22, to construct an amplification unit. Here, the inductors L21 and L22 have different characteristics.
An input terminal IN is serially connected to the capacitor C21 and the inductor L23, which are serially connected, and coupled to the gate of the main transistor MN21 such that an input signal is amplified. The capacitor C22 is inserted between the gate of the main transistor MN21 and the gate of the auxiliary transistor MN22 to amplify the input signal using the auxiliary transistor M22.
The output of the current source Is21 is applied to the drain and gate of the transistor MN23 for biasing, the output of the current source Is22 is applied to the drain and gate of the transistor MN24 for biasing, and the current sources Is21 and Is22 receive a power supply voltage Vdd.
The resistor R21 is serially connected between the gate of the transistor MN23 and the gate of the main transistor MN21 and the resistor R22 is serially connected between the gate of the transistor MN24 and the gate of the auxiliary transistor MN22 to bias the transistors MN21 and MN22. The drain of the transistor M25 is connected to the capacitor C23 to construct an output terminal and the source of the transistor MN25 is connected to the drains of the transistors MN21 and MN22 to output a signal.
In the amplifier circuit of FIG. 2, the inductors L21 and L2 having different characteristics are respectively connected to the main transistor MN21 and the auxiliary transistor MN22 in order to improve linearity. In this case, however, the amplifier circuit requires one more inductor than the amplifier circuit of FIG. 1. In addition, it is difficult to determine the inductance of the inductor L22 of the auxiliary transistor MN22 and the amplifier circuit is applied only to a narrow band. Furthermore, there is no method for processing induced gate noise (referring to IEEE RFIC Symposium 2004 Fort Worth, Tex. USA 6-8, Jun. 2004′) generated in the auxiliary transistor.